A new computational method has produced parity-check circuits that meet, or come within one layer of, the graph-degree lower bound in several structured qLDPC code families. The manuscript is an arXiv preprint, version 2 dated 4 October 2026.
The framework works by identifying edge symmetries created by the way these codes are built, solving a smaller scheduling problem on the underlying components, and lifting that solution to the full code. For Quantum Tanner codes, the authors combine a layer-by-layer greedy algorithm with a CP-SAT solver for cases the greedy procedure misses.
The method also enforces properness with a parity rule. For each overlapping pair of X and Z checks, the number of shared data-qubit interactions in which the X check occurs earlier must be even.
Depth follows the code's construction
For the reported Lifted Product schedule, the total depth is the degree of component A plus twice the ceiling of half the degree of component B. The lower bound is the sum of the two component degrees. The schedule reaches that bound when component B has an even degree and sits one layer above it when that degree is odd.
For the Balanced Product setup analyzed with one free factor, the schedule follows the same broad pattern. It meets the lower bound when the quotient-base degree is even and exceeds it by one layer otherwise. The lower bound combines the maximum degree of the quotient base graph with the maximum degree of the fibre graph.
The Quantum Tanner tests
The base Quantum Tanner evaluation covered 3,180 permutation cases in a canonical-orientation analysis. The greedy algorithm reached the graph-degree lower bound in 3,136 cases. Of the remaining 44, the analysis found no lower-bound circuit for any tested halving in 24 cases, while in 20 cases it found that a lower-bound circuit existed even though the greedy procedure had missed it.
A separate test used 27 supplied lifted Quantum Tanner codes, including instances with up to 576 data qubits. Twenty-five reached the lower bound. The other two reached lower bound plus one, and CP-SAT certification found no lower-bound circuit for either exception under the canonical orientation.
The study also compared its results with a left-right circuit. That circuit reached the lower bound in 240 of the 3,180 permutation cases, using an amortized depth calculated per syndrome-extraction round. Because that figure is averaged across rounds, it is not necessarily directly comparable with every single-circuit depth in the new analysis.
What the results do not settle
The scheduling formulation allows at most one gate per qubit in each layer, but it imposes no qubit-connectivity restriction. Physical connectivity is therefore outside the optimization problem described by the reported depths.
The Quantum Tanner permutation study used only a small subset of inequivalent column permutations across the listed local-code pairs. Its results therefore describe the tested presentations rather than every possible column ordering of those codes.
The analysis also leaves an important mathematical question open. In the both-odd Lifted Product case, the supplied text does not generally prove that the lower-bound-plus-one result is globally optimal. The Quantum Tanner result is likewise limited to the supplied instances and the canonical-orientation analysis.
Supplementary material provides analytical derivations and numerical results supporting the main text. The manuscript also states that supporting data are openly available through the listed repository.
Paper data and sources
Original title: Disassembling qLDPC codes for depth-optimal parity-check circuits
Authors: Minh T. P. Nguyen, Maximilian Rimbach-Russ, Stefano Bosco
Journal/Repository: arXiv
Status: Preprint, not yet peer-reviewed
First online: 2026-08-20
DOI: Not available
Original paper · Full text